Job Details

Energy Jobline is the largest and fastest growing global Energy Job Board and Energy Hub. We have an audience reach of over 7 million energy professionals, 400,000+ monthly advertised global energy and engineering jobs, and work with the leading energy companies worldwide.

We focus on the Oil & Gas, Renewables, Engineering, Power, and Nuclear markets as well as emerging technologies in EV, Battery, and Fusion. We are committed to ensuring that we offer the most exciting career opportunities from around the world for our jobseekers.

Job Description

Rivos Custom Circuits team is seeking highly motivated candidates to develop state of the art custom SRAM memories, Register file memories, and compiled memories to improve circuit performance, optimize dynamic and static power and support silicon bring up. The role will be at the center of a state-of-the art circuit design effort, interfacing with all disciplines and have a critical impact on getting products to market quickly. The qualified candidate will be responsible for designing and delivering custom circuits from scratch. Candidates must have 8-10 years of experience in transistor level circuit design, circuit simulation, equivalence checking, PPA trade off analysis, low power design techniques, timing, noise and power characterization.

Key Qualifications

• The ideal candidate will have 12-15 years of custom circuit design experience from RTL-GDS for CPU and SoC applications
• Prior experience and proven success of successfully designing high performance SRAM memories, Register file memories, SRAM compilers, data path designs and standard cells
• Experience designing transistor-level custom circuits in advanced FinFET technology nodes
• Must have a solid experience with the custom circuit tool flows for delivering design collaterals
• A solid understanding of device physics, process technology and circuit design techniques for high performance, low power, and power gating
• Experience with advanced process design rules and supervising mask design
• Knowledge developing automation for compilers and standard cells
• Post-Silicon test and debug experience
• Ability to work well in a team and be productive under aggressive schedules.
• Excellent problem solving, written and verbal communication

Responsibilities

• Drive design and development of SRAM, register file, custom cells to enable high performance and low power designs
• Work with microarchitecture team to gather specifications and drive optimal implementation
• Conduct early sizing estimates and PPA analysis .
• Design entry and simulations for optimal design sizing.
• Design equivalence checking using the latest industry standard LEC tools
• Work closely with mask designers on custom design implementation, DFM and yield enhancement features
• Deliver high quality design collateral
• Collaborate with the CPU and SoC Physical design teams on floorplanning, placement, timing and power closure of the custom design
• Interact with technology team, participate in developing design and test plansCollaborate with CAD teams and drive design flow enhancements

Education and Experience

• Master's Degree or Bachelor's Degree with 12-15 years of experience

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

If you are interested in applying for this job please press the Apply Button and follow the application process. Energy Jobline wishes you the very best of luck in your next career move.