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Job Details

CPU Debug and Power Management Verification Engineer

  2025-07-08     AECOM     Beaverton,OR  
Description:

CPU Debug and Power Management Verification Engineer

Location: Beaverton, Oregon, United States

Department: Hardware

Summary

Posted: May 19, 2025

Role Number: 200605122

Imagine what you could do here. At Apple, new ideas quickly turn into extraordinary products, services, and customer experiences. Bring passion and dedication to your job, and there's no telling what you could accomplish. Our innovative technologies and dynamic team are redefining industries with Apple Hardware products. We are committed to leaving the world better than we found it. Join us to help deliver the next groundbreaking Apple product!

In this highly visible role, you will collaborate across disciplines to ensure the successful delivery of functional products to millions of customers.

Responsibilities

  1. Work across the product lifecycle, from pre-silicon test planning to post-silicon support and debug.
  2. Verify the functionality of CPU Power Management, clock control, and debug logic in collaboration with architecture and RTL teams.
  3. Develop and execute comprehensive test plans and schedules.
  4. Write and debug tests using Assembly, SystemVerilog, SVA, C++, and scripting languages across simulation, emulation, and FPGA environments.
  5. Build and maintain verification infrastructure, including checkers and coverage monitors.
  6. Analyze functional coverage to ensure test completeness.
  7. Identify and document design issues, collaborating with RTL teams for fixes.
  8. Support SoC-level debug for clock and power integration issues.
  9. Assist silicon bring-up teams and contribute to post-silicon debug efforts.

Minimum Qualifications

  • Bachelor's degree and 3+ years of relevant industry experience.
  • Proficiency in Perl/Python or SystemVerilog.

Preferred Qualifications

  • Experience in processor or power management architecture and verification.
  • Knowledge of system fabric protocols like AXI.
  • Experience with verification environments such as UVM and random constraint verification.
  • Familiarity with SystemVerilog assertions, silicon bring-up, UPF, and low power simulation.
  • Experience with processor debug features, including hardware trace, is a plus.
  • Knowledge of formal verification techniques is advantageous.
  • Advanced programming skills, including object-oriented programming or CPU assembly language, are a plus.
  • Excellent communication skills and ability to articulate complex issues.
  • Ability to create and follow detailed work schedules independently.

Apple is an equal opportunity employer committed to diversity and inclusion. We do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other protected characteristics. Learn more about your EEO rights here.

We participate in the E-Verify program where required by law. More information can be found here.

We are committed to providing reasonable accommodations for applicants with disabilities. Learn more about our policies here.

Apple is a drug-free workplace and considers qualified applicants with criminal histories in accordance with applicable laws. For San Francisco applicants, please review the local Fair Chance Ordinance. In Massachusetts, lie detector tests cannot be required as a condition of employment.

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